Google on November 9, 2026 expanded its eighth-generation TPU family with two new systems aimed at agent workloads, according to a post by Amin Vahdat, senior vice president and chief technologist for AI and infrastructure. TPU 8tx is described as a configuration for secure and confidential inference, and TPU 8i Max as a dual-chip package built for large context windows and higher compute density in the same rack footprint. Vahdat said this is the first year Google has introduced four TPU systems: TPU 8t and TPU 8i, unveiled at Google Cloud Next in April, plus the two announced today.
Vahdat distinguishes a new chip, which takes years to design and manufacture, from a new system that rearranges packaging, memory, networking and security around existing silicon. TPU 8tx uses the same silicon as TPU 8t and, in the Google blog, is paired with 5th Generation AMD EPYC CPU hosts. Google says it keeps sensitive data and model weights isolated in hardware even while they are in use, and adopts the low-latency Boardfly network first used for real-time reasoning. The company claims up to twice lower latency than TPU 8t with a near-zero performance penalty, and says customers can fine-tune models, distill them and train agents with reinforcement learning on one system without moving private data between clusters.
TPU 8i Max puts two TPU 8i chips in a single package. Google says that doubles compute, on-chip SRAM and HBM bandwidth compared with TPU 8i, so large contexts are less likely to stall, and that fitting twice the silicon in the existing rack raises compute per square foot and per watt. The April systems remain the generation's baselines: Google says TPU 8t offers up to 2.7 times better training performance than the previous generation, and TPU 8i about 80 percent better inference price performance. Vahdat wrote that TPUs now serve nearly 100 customers and can run inside Google, on Google Cloud, or in a customer's own data center.
The same post presents a software stack meant to make those systems easier to use. Google says it open-sourced TorchTPU last month so PyTorch code and Hugging Face models run natively on TPUs, with TPU backends for vLLM and SGLang, a preview TPU agent suite for tools such as Claude Code, Cursor and Google Antigravity, and an open-source XLA Serving Engine. A new Agent Compute Engine, Google says, suspends idle agent sessions and moves working memory off the chip in milliseconds. Google is also open-sourcing TPU Sync, which it calls the model-state layer for TPU clusters. A companion Cloud post by Fenghui Zhang and Weiren Yu says the library cuts key-value cache transfer latency by more than 90 percent and reduces time to first token by about 90 percent on large mixture-of-experts models in internal tests.
Cloud Pathways, the distributed runtime Google DeepMind built to train and serve models including Gemini, is now generally available on Google Kubernetes Engine. Google says customers have used Pathways on GKE for more than 130 million Cloud TPU chip-hours in the past 90 days, and that a preview extends it to Slurm clusters through Cluster Director. GKE dynamic slicing is also generally available. Google says it uses optical circuit switching to assemble TPU cubes into larger topologies or split them into smaller isolated slices, cutting job startup times by up to five times and recovery by up to 4.5 times compared with recreating static node pools.
All performance, customer-count and efficiency figures above are Google's claims. Independent benchmarks of TPU 8tx and TPU 8i Max were not published with the announcement, and TPU Sync's reported gains come from Google's July 2026 laboratory tests on TPU v7x hosts. Google invited viewers to a broadcast at 9 a.m. Pacific Time on the day of the post.